Posts Tagged ‘fin’

Intel launches Ivy Bridge processor

Monday, April 23rd, 2012

Intel has rigourously launched a Ivy Bridge processor to a marketplace according to countless online reports. Ivy Bridge is a initial device to strictly come out on a company’s 22-nm production routine record that includes FinFETs that are transistors built into a straight fin of silicon.

UBM has already finished an engineering hearing of a Ivy Bridge processor in allege of a grave launch (see couple below).

The launch covers quad-core inclination directed during desktop computers with dual-core inclination for ultrabooks – Intel’s tenure for skinny notebooks – due to be announced after in a spring, a reports said.

The pierce from 32-nm Sandy Bridge processor to 22-nm Ivy Bridge should yield 20 percent some-more opening during 20 percent reduction normal energy according to one estimate.

The chip includes a graphics processor section and DirectX11 support. DirectX is a collection of focus programming interfaces (APIs) for doing multimedia tasks specified by Microsoft Corp.

Related links and articles:

Intel says 25% of shipments will be on 22-nm in Q2

Analysts start Intel Ivy Bridge CPU teardown

Intel gives deeper demeanour into Ivy Bridge

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Why Intel’s 22nm record unequivocally matters

Wednesday, May 4th, 2011

The fact that Intel announced a 22nm technology, a world’s many modernized routine for prolongation logic, during a press eventuality progressing currently was frequency surprising. The tick-tock intonation of Intel’s record continues like clockwork. What is really surprising, however, is how Intel got there. The 3-D transistors, famous as tri-gates, that Intel will broach during 22nm after this year are a mangle from a simple planar transistor that has been a substructure of integrated circuits given their invention in a 1950s.

Intel will use this novel 22nm record to make a Ivy Bridge processors, that should be in volume prolongation in a second half of this year and accessible in PCs and servers starting in early 2012. To denote that Ivy Bridge is real, Intel showed several operative systems including a server with a dual-core processor, a desktop regulating a pushing diversion and a laptop personification a 1080p video. Intel pronounced that a 22nm tri-gate transistor will broach 37% improved opening than a 32nm planar transistors used in Sandy Bridge chips–already a fastest by a far-reaching margin. Alternatively, Intel can balance a tri-gate transistors to yield a same turn of opening while regulating half a energy of Sandy Bridge. The 22nm record will boost a CPU opening in Ivy Bridge, yet Dadi Perlmutter, a clamp boss and General Manager of a Intel Architecture Group, also hinted it will make a vast disproportion in a graphics and media estimate capabilities of Ivy Bridge.

(Intel has posted lots of background element on a 22nm technology.)

This transition will start as a rest of a attention is changeable from 45nm/40nm to 32nm/28nm. Like a introduction of high-k materials and steel gates (HKMG)–where competitors are still personification catch-up 3 years later–the change to tri-gates could propel Intel years forward of AMD. And since a 22nm record with tri-gates is not usually denser, yet also uses reduction power, it should work good in mobile inclination giving Intel a uninformed possibility to plea companies that pattern ARM-based focus processors such as Qualcomm, Samsung, Texas Instruments and Nvidia. While SOCs (System-On-Chip) regulating Intel’s 22nm routine record will come later, Atom is on an accelerated report and will be expelled around a same time as new PC processors in destiny generations.

The immeasurable infancy of today’s integrated circuits are built regulating planar transistors, definition ones in that a silicon channels that control a upsurge of electrons when a switch (the embankment electrode) is incited on and off distortion prosaic on a silicon bottom or substrate. For decades, a attention has been means to constantly cringe a facilities of these transistors, make-up some-more into a given area of silicon with any new era of routine technology–the materialisation famous as Moore’s Law. But starting during around 90nm, that Intel introduced in 2004, a attention strike a roadblock. Certain elements became so little that a gates that control a switching of transistors began leaking stream formulating a energy problem. The resolution was a HKMG recipe that Intel introduced on a 45nm processors starting in early 2008. This authorised Intel to use thicker insulating layers to control embankment steam though sacrificing performance.

It’s probable to build 32nm/28nm chips regulating required polysilicon oxynitride gates–most semiconductor foundries will offer this–but a advantages of HKMG are so poignant that a rest of a attention is following suit. AMD’s Llano processor, which is now shipping and should seem in desktops and laptops starting in June, is made by GlobalFoundries regulating a 32nm HKMG process. TSMC, a world’s largest semiconductor foundry, will start volume prolongation of chips regulating a 28nm HKMG routine after this year, followed by GlobalFoundries on that node in early 2012.

As chip designers scale transistors over 32nm, however, a facilities start to turn so little that it creates some-more electrostatic problems. In other words, it is formidable to scrupulously control a switching of a transistors. One resolution to this is a 3-D or non-planar transistor structure. Most of a attention refers to this as a FinFET (Field-Effect Transistor) since a conducting channel sticks adult from a substrate like a fin with a embankment on possibly side–or a double-gate–to improved control switching. The problem with FinFETs is that they need a comparatively skinny and high fin, that is formidable to manufacture. Think of it like building a skyscraper contra a little bureau building (although we could fit maybe 5,000 of these “skyscrapers” in a breadth of a tellurian hair). Intel has a opposite turn on a FinFET. The tri-gate surrounds a channel on 3 sides so that it can effectively control a shorter and wider fin that should be easier to build, yet it is still some-more severe than a tried-and-true planar transistor. (The ideal transistor would have a embankment that wrapped all a proceed around a little silicon nanowire, yet this is unfit to make regulating today’s technology.)

When we yield some-more than 80 percent of a world’s microprocessors, we don’t usually hurl a bones on a totally new technology. Like HKMG, tri-gates have been in a works for a prolonged time. In 2002, Intel gave a display display because tri-gates would be easier to make than other fully-depleted such as a single-gate (planar) or double-gate (FinFET). In 2004, Intel showed tri-gates could urge electrostatics and extend transistors scaling for 32nm and beyond. And by 2006, a association was deliberating how tri-gates could be total with other pivotal technologies such as HKMG and stretched silicon to furnish circuits with aloft opening and reduce energy than planar transistors on a same node (65nm during a time).

The introduction of tri-gate transistors will capacitate Moore’s Law to continue. Intel pronounced a tri-gate structure will work not usually during 22nm, yet also on a 14nm record scheduled for prolongation in late 2013. More important, it should concede Intel’s business to build not usually laptops yet a whole operation of inclination from smartphones to servers in vast information centers that have significantly improved opening and use reduction power.

In a meantime, Intel’s competitors will have a lot of tough choices to make after 28nm. They can hang with a planar transistor structure on an outlandish substrate famous as ET-SOI (Extremely Thin-Silicon On Insulator), yet these wafers are formidable to manufacture. Intel pronounced a tri-gate proceed will supplement dual to 3 percent to a cost of a finished wafer while ET-SOI will supplement 10 percent to a prolongation cost. Or a foundries might select to switch to a 3-D double- or tri-gate structure starting during 14nm. None of these will be easy. In addition, Intel has a oppulance of formulating one record optimized privately to work on a processor design. The foundries need to come adult with routine record that will work with all from programmable proof (Altera and Xilinx) to graphics processors (AMD and Nvidia) to mobile processors and wireless basebands (Qualcomm, Broadcom and others). Intel Senior Fellow Mark Bohr pronounced that Ivy Bridge will give Intel as most as a three-year conduct start contra a competition, yet looking during all these factors we could disagree a lead might be even larger in a subsequent few years.

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